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The Configurable Fault Tolerant Processor (CFTP), developed by the Space Systems Academic Group at the Naval Postgraduate School, is an experimental payload on board the United States Naval Academy's (USNA) MidSTAR-1 satellite. Midstar-1 was launched into a 492km low earth orbit (LEO) on March 8, 2007, aboard an Atlas V expendable launch vehicle from Cape Canaveral Air Force Station, along with FalconSat 3, STPSat 1, and CFESat as secondary payloads. The primary payload was Orbital Express. ==CFTP Purpose== The Configurable Fault Tolerant Processor Project aims to demonstrate the feasibility of using Field Programmable Gate Arrays (FPGAs) for spacecraft computer processing by applying various fault tolerance techniques to the designs. CFTP provides a valuable testbed for on-orbit evaluation of various fault tolerant concepts. The use of FPGAs provides added flexibility, allowing on-orbit upgrades and rapid development cycles. Using Commercial off the shelf (COTS) technology allows the engineer to produce more technologically advanced designs at a lower cost and in a shorter time than using more traditional space-grade components. Space-based FPGA design also provides the Naval Postgraduate School students with unique challenges in developing for and configuring the system. Remotely accessing the platform over a limited downlink and uplink provides challenges not seen on ground based systems. 〔(【引用サイトリンク】publisher=Naval Postgraduate School )〕 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Configurable Fault Tolerant Processor」の詳細全文を読む スポンサード リンク
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